Example of GCI Pin-Less Kapton Diamond Plated Interposer
DC to >40 GHz Bandwidth Conductive Diamond Plated (CDP) Interposer for Test Sockets
High Pin count BGA Test Socket (up to 2410 pin)
No Measurable Interposer Inductance or Capacitance with only ~1 % increase in impedance
Thousands of insertions without measurable degradation in signal integrity
Current handling for 10 mil diameter pad is ~15 amps
Fine Pitch Capability : Contact Point Size is 5 um; .4mm pitch can be achieved
High Performance RF Socket
Money Back Guarantee
Socket Interposer Electrical Specification ¨> 40 GHZ bandwidth (insertion loss) ~40Ghz return loss ¨No measurable inductance, or capacitance ¨~1 % increase in impedance measured at 10gbits data rate
Interposer Interconnect Technology ¨10-20 um conductive diamonds ¨10 micro-inches gold plated ¨Contact point size is 10um; 10-mil pitch can be achieved. ¨RoHs compliance - lead free Pin Count ¨>2000
Maintenance ¨Surface can be refurbished ¨Clean with ultrasound bath Reliability ¨100’s of thousands of insertions without measurable degradation in signal integrity Force ¨10-15 Grams force per pad required to achieve electrical continuity Current Handling: ¨~15 amps per 10 mil diameter pad Temperature range ¨–60C to 200C for Kapton film Interposer
Giga Connections, inc. integrates a Conductive Diamond Plated (CDP) Interposer with a new one-screw heat sink/fan test socket assembly to create a new line of low cost and easy-to-assemble BGA test sockets with interconnect bandwidths beyond 40 GHz.
For example, a 672 BGA socket assembly requires only 3 to 4 inch-lb torque to achieve continuity on all balls. This socket can be sized to meet any specific pin count. The (CDP) interposer consistently demonstrates almost no inductance or capacitance following thousands of insertions. The typical 1% impedance interconnect discontinuity is similar to a soldered junction, such that for Gigabit applications, the (CDP) socket makes an excellent replacement for RF pogo pin or spring type socket architectures.
Conductive Diamond Interposer
Socket and Interposer installed on Board. Beveled socket guides device into position
Device installed in test socket
Heat sink with Torque Adjustment Screw Holds Socket Assembly
Sockt with Fan Assembly on Test Board
Assembling and Testing our Sockets
Each of our Custom Design Verification socket is fully tested before it is shipped to our customers.A test board is built and a shorting die is inserted to validate all of pads are connected to the die. The slide show visually describes how the socket is assembled for testing.
Current Path Through the GCI Dual Pin-less Kapton Interposer with Gold Plated Diamond Pads
Signal Path through the Giga Connection, inc. patent pending pin-less mechanical compliant conductive diamond DC-40Ghz interposer
The “Side” view picture on the right show a cutout of two interposers one atop another. The round object on top represent a BGA solder ball pressing down on the conductive diamond pads that match the package layout. Each pad is plated with conductive diamonds that form a sharp multi-point non scrubbing compression surface that breaks through any oxide or contaminate on the solder ball forming a “solder like” connection.
Each pad matches the size and pitch of the device package to reduce impedance discontinues. There is a small cantilever trace (=>20 mills) that connects the top pad to a bottom pad on the top cantilever. The bottom interposer is the same at the top interposer but flipped and makes contact to return the signal via its cantilever trace back to the same position under the solder ball. The signal path is traced out by a green line in the diagram.
The “Top” view picture on the left is a picture of the conductive diamond pads and the green trace is the cantilever trace, connecting the tip pad to the bottom pad on each interposer.To provide independent movement for each pad, the pad and cantilever trace is cut out using a patent pending laser technique. Separating each pad and cantilever section from the kapton provides independent movement for each pad. This technique provides a pin-less mechanical compliant electrical connection for each solder ball on the device and its associated pad on the test board.
Test Socket Signal Integrity Performance Analysis
TDR of Conductiive Diamond Interposer show NO Discontinuity and very little impedance change
TDR of PogoPin Interposer Show large Capactive dip and impedance discontinuity
The TDR impedance profiles in the figures above show a communication channel using the Conductive Diamond Plated Interposer socket compared to a channel using a pogo pin socket. The Z-Line impedance waveform from the TDR was measured into the pogo pin socket. It can be seen that the pogo pin socket presents a large capacitive impedance discontinuity ~38 ohms verses only 1.6 ohms for the Conductive Diamond Interposer Socket from Giga Connections, Inc. The large capacitance discontinuity of the pogo pin socket reduces the S11 S-parameters of the test board and therefore can not be used to judge the actual signal integrity performance of the device.The Conductive Diamond Interposer socket impedance therefore, compares to that of a soldered device. This socket can be used for full SI testing, without soldering the device to the test board, enabling the test board and device can be reused saving both money and time.
The TDR measurement of the Pogo Pin socket was performed at an earlier date on a different Malbec board. Due to impedance variations between boards, and different revision levels, the PCB trace and BGA pad impedances of the board are different but the impedance of both sockets interposers are the same for both versions.
6.25Gbit NRZ Eye Diagarm using Conductive Diamond Test Socket
Eye Diagram measurement using the Conductive Diamond Socket
6.25 Gb/s, NRZ Eye Diagram
An NRZ eye diagram was measured at a raw data rate of 6.25 Gb/s. The TX amplitude is set to 0. The TX EQ taps are set to [0 80 -15 0 0]. No codec is used (pure PRBS 231-1). The onboard PLL is used as the serial link reference clock to the EN6110.
10 Gb/s, PAM4 Eye Diagram
A PAM4 eye diagram was measured at a raw data rate of 10 Gb/s. The TX amplitude is set to 0. The TX EQ taps are set to [0 80 -10 0 0]. The 16b10s Codec is used. The onboard PLL is used as the serial link reference clock to the EN6110.
10Gbit PAM4 Eye Diagarm using Conductive Diamond Test Socket
The repeatability of the socket TDR impedance profile was tested by removing the socket from the U2 position, and then reinstalling it using the same torque value. TDR measurements and Z-Line extractions were performed each time. The above TDR plot shows a comparison between the Z-Line TDR data of the two installations of the socket. The region of the impedance traces between the EN6110 balls and the EN6110 RX termination shows about 1 – 2 ohms of impedance difference. This is a very minimum impedance difference, and demonstrates that the socket has a high level of repeatability.
TDR of Multiple Device Insertions Shows a High Degree of Repetability